Specifications

Directory of Specifications
Revision 2.18

April 22, 2009

This directory lists all the specifications that PICMG has published or is working on. Click here to find out how to order published specifications. Some specifications have short form versions available for download. Click here to see downloadable short form specifications. Some specifications have pages with more information. Click on the specification name to go to that page.

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Warning! Draft specifications and ECR’s are under the control of the subcommittee, if active. It is PICMG’s policy to prohibit claims of compliance with respect to a specification under development. Any such claims must be understood as applying to a draft, which is subject to change.
PICMG – No.	Name			Revision ECN		Date	Status		Description

1.0	PCI/ISA			R2.0		10-Oct-94	Adopted		Define CPU form factor and backplane connector for PCI-ISA Passive Backplanes
				D3.0			Abandoned		Incorporate provisions of the PCI Local Bus Specification Revision 2.2 and the PCI-X Addendum Revision 1.0. Clarify interrupt and IDSEL bindings in bridged environments. Clarify mechanical requirements for SBCs having 32 bit PCI connector to insure compatibility with 64 bit sockets.
1.1	PCI/ISA Bridging			R1.1		25-May-95	Adopted		Define a form factor and backplane connector layout for PCI-PCI bridge boards
1.2	PCI Only (e-PCI-X)			R1.0		23-Jan-02	Adopted		Standardize the mechanical and electrical interface to support a standard form factor PCI computer system with either two PCI/PCI-X busses or a single PCI/PCI-X bus.
1.3	SHB Express					20-Aug-05	Adopted		Modernize the PICMG 1.0 “Passive Backplane” single board computer specification. SHB Express, or System Host Board – Express, uses the same physical form factor as 1.0 boards. The board-to-board interface is PCI Express instead of PCI, although the use of PCI remains as an option.

2.0	CompactPCI			R2.1		2-Sep-97	Obsolete		Define a IEEE 1101.1 (Eurocard) PCI form factor, and assign a PCI pinout on the IEC 1076-4-101 family of 2 millimeter hard metric connectors.
				R3.0		1-Oct-99	Adopted		Incorporate Hot Swap pin sequencing and other enhancements
				ECN 002		23-Jan-02	Adopted		Geographical to Logical Address Mapping
2.1	Hot Swap			R1.0		3-Aug-98	Obsolete		Incorporate Hot Swap pin sequencing and other enhancements
				R2.0		17-Jan-01	Adopted		Incorporate ECRs for: Enhanced software connection architecture, 3.3 volt 66 MHz support, PCI-X compatibility, Compliance language
2.2	VME64x			R1.0		9-Sep-98	Adopted		Define pin assignments for the VME64 Extensions, as standardized under the auspices of ANSI and VITA, on J5/P4 and J5/P5 of a CompactPCI backplane.
2.3	PMC I/O			R1.0		9-Sep-98	Adopted		Define user IO pin mappings from IEEE 1386 PMC sites to J3/P3, J4/P4, and J5/P5 on a CompactPCI backplane.
2.4	IP I/O			R1.0		9-Sep-98	Adopted		Define user IO pin mappings from ANSI/VITA standard IP sites to J3/P3, J4/P4, and J5/P5 on a CompactPCI backplane.
2.5	Telephony			R1.0		3-Apr-98	Adopted		Defines the utilization of CompactPCI user definable pins for the computer telephony functions of standard TDM bus, telephony rear IO, 48 VDC and ringing distribution in a 6U chassis environment.
2.6	Bridging						Dormant		Defines a means for CompactPCI CPU boards to drive two independent PCI bus segments in a 6U environment.
2.7	Dual CompactPCI			R1.0		11-Apr-01	Adopted
2.8	PXI						Dormant		Define a pinout of the J2 connector for use in instrumentation systems based on CompactPCI
2.9	Management			R1.0		2-Feb-00	Adopted		A specification for a secondary system management bus for CompactPCI.
				ECN 001		20-May-02	Adopted		Defines CompactPCI slot connectivity data
2.10	Keying			R1.0		1-Oct-99	Adopted		Use of the keying mechanisms defined in IEC 1076-4-101 for the J4/P4 connector and in IEEE 1101.10 for handle and cardguide hardware.
2.11	Power Interface			R1.0		1-Oct-99	Adopted		Define the electrical and mechanical requirements relating to the functionality and interoperability of plug-in power modules in CompactPCI systems
2.12	Software Interoperability			R1.0		23-May-00	Obsolete		Define vendor-independent software interfaces supporting control of the software and hardware connection processes as defined in PICMG 2.
				R2.0		20-May-02	Adopted		Update to include, PICMG 2.1 R2.0,Windows and Linux updates, Redundant System Slot (RSS) API, Switched PCI-PCI bridging support, Hardware- and O/S-independent models of network-connected intelligent nodes, Standards-based management of HS- and RSS-capable CompactPCI platforms andIDSEL to GA mapping - ECR to PICMG 2.1
2.13	Redundant System Slot						Abandoned		Define an approach to make the PCI System Slot functions redundant so the System Slot CPU can be Hot Swapped.
2.14	Multicomputing			R1.0		5-Sep-01	Adopted		Define packet-based communications between heterogeneous PCI agents (multi-computing) within the CompactPCI system architecture.
2.15	PTMC			R1.0		11-Apr-01	Adopted		Define PTMC to support specialized telecom interfaces and coexist with PMC.
				ECN 001		22-Jan-03	Adopted		Enhances TDM capacities by extending the TDM (H.110) bandwidth and adding Ethernet links, as well as combining ATM capabilities with Ethernet links
2.16	PSB			R1.0		5-Sep-01	Adopted		Develop a CompactPCI Packet Switching Backplane specification that is an extension of the PICMG 2.x family of specifications by overlaying a packet based switching architecture on top of CompactPCI.
2.17	StarFabric			R1.0		20-May-02	Adopted		Develop a specification that defines backplane, node card and switch card requirements that are compatible with both the StarFabric Protocol Specification and appropriate existing PICMG Specifications.
2.18	RapidIO			R1.0		18-Jun-04	Adopted		Defines redundant, switched, high-speed point-to-point connectivity among some or all slots using Serial RapidIO and coexisting with 64 bit CompactPCI H.110 and optionally PICMG 2.16
2.20	Serial Mesh			R1.0		21-Oct-02	Adopted		Define a point-to-point serial interconnect intended to add high-speed cell based data transport to the PICMG 2.x platforms. The CSMB proposal is based on new high-speed signaling and connector standards to improve differential line
2.50	CompactTCA						Dormant		Formalize a set of compatible practices for managed PICMG 2.16 platforms, which constrain implementation options so as to enhance interoperability.

3.0	AdvancedTCA Base			R1.0		30-Dec-02	Obsolete		The PICMG 3.0 “core” specification will specify board, backplane and shelf mechanicals, power distribution and the connectivity required for system management. Multiple zones for connectors and their alignment and keying features will also be defined, and the physical mapping to a connector family will be specified. Specific fabric definitions will be undertaken on subsidiary specifications (PICMG 3.1, PICMG 3.2, etc.). In this manner, component interoperability will be defined by the combined PICMG 3.0 core specification and a subsidiary fabric specification. It is the intent to develop the core specification and subsidiary specifications as nearly in parallel as possible
				R1.0 ECN 001		21-Jan-04	Obsolete
				R2.0		18-Mar-05	Obsolete
				R2.0 ECN001		15-Jun-05	Obsolete		ShMC Cross Connect
				R2.0 ECN002		29-Apr-06	Obsolete		Miscellaneous CRs
				R3.0		24-Mar02008	Adopted		Incorporate ECN’s to R2.0 and additional CR’s
3.1	AdvancedTCA Ethernet			R1.0		22-Jan-03	Adopted		Define how Ethernet and Fibre Channel are mapped onto PICMG 3.0 . The intended implementation practice will normally include at least one link of Ethernet, and usage of Fibre Channel will be optional.
				R2.0			Under Development		Develop enumerated requirements that incorporate 1000BASE-KX, 10GBASE-KX4 and 10GBASE-KR fabric options into Revision 2.0 of the PICMG 3.1 specification.
3.2	AdvancedTCA InfiniBand			R1.0		22-Jan-03	Adopted		Define how InfiniBand transport is mapped onto PICMG 3.0
3.3	AdvancedTCA StarFabric			R1.0		21-May-03	Adopted		Define how StarFabric transport is mapped onto PICMG 3.0 f
3.4	AdvancedTCA PCI Express			R1.0		21-May-03	Adopted		Define how PCI Express and PCI Express Advanced Switching transport is mapped onto PICMG 3.0
3.5	AdvancedTCA RapidIO					21-Sept-05	Adopted		Define how Serial RapidIO transport is mapped onto PICMG 3.0
3.6	AdvancedTCA PRS						Dormant		Define how Packet Routing Switch (PRS) is mapped onto PICMG 3.0
TBD	xTCA for Physics					10-Mar-09	Under Development		Develop additional features and options for ATCA and MicroTCA for use in particle physics research including data collection and accelerator control systems

AMC.0	AdvancedMC Mezzanine Module			R1.0		1/3/2005	Obsolete
				R2.0		15-Nov-06	Adopted		Define a mezzanine building block approach for the addition of crucial functionality to a PICMG 3.0 carrier card available from a number of third party suppliers.
				ECN001		26-Jun-06	Obsolete		Incorporated in R2.0
				ECN002		15-Nov-06	Obsolete		Incorporated in R2.0
AMC.1	AdvancedMC PCI Express and AS			R1.0		20-Jan-05	Adopted		Defines port usage for PCI Express and Advanced Switching environments on AMC.0
				R2.0		08-Oct-08	Adopted
AMC.2	AdvancedMC Ethernet						Adopted		Defines port usage for Ethernet on AMC.0
AMC.3	AdvancedMC Storage					25-Aug-05	Adopted		Defines port usage for Fibre Channel on AMC.0
AMC.4	AdvancedMC Serial RapidIO					11-Jul-09	Ratified		Defines port usage for Serial RapidIO on AMC.0
ARTM.0	AdvancedTCA Rear Transition Module						Under Development		Standardize support for RTMs as manage FRUs.

SFP.0	System Fabric Plane			R1.0		24-Mar-05	Adopted		Define a consistent method for carrying encapsulated TDM across any AdvancedTCA transport whether it be PICMG 3.1, 3.2, etc. (or a custom transport implementation on PICMG 3.0), as well as for PICMG 2.16.
SFP.1	iTDM			R1.0		24-Mar-05	Adopted		Define an Internal TDM (I-TDM) multiplexed voice over packet protocol that is optimized for Voice LANs and Packet Backplanes

EXP.0	CompactPCI Express			R1.0		27-Jun-05	Adopted		Define the connector, electrical, and mechanical requirements of 3U/6U System Boards, Peripheral Boards, Switch Boards, and Backplanes using PCI Express as peripheral interconnect with CompactPCI interoperability features.
PICMG 2.30 CPLUS.0	CompactPCI Plus						Member Review Under Development		Define the connector, electrical, and mechanical requirements of 3U/6U System Boards, Peripheral Boards, Switch Boards, and Backplanes using PCI Express as peripheral interconnect, and supporting a variety of other switched serial interconnects, with CompactPCI and CompactPCI Express interoperability features.

COM.0	Computer On Module			R1.0		10-Jul-05	Adopted		Define a Computer-On-Module, or COM, with all components necessary for a bootable host computer, packaged as a super component. Interfaces will provide a smooth transition path from legacy parallel interfaces to LVDS (Low Voltage Differential Signaling) interfaces. These include the PCI bus and parallel ATA and PCI Express and Serial ATA.
				R2.0			Under Development		Additional support for new chipsets and interfaces
CDG	COM Design Guide			R1.0					Define interoperability guidelines for COM.0 compliant modules and carriers.

MTCA.0	MicroTCA			R1.0		6-Jul-06	Adopted		Define a system architecture that uses AdvancedMC mezzanine cards plugged directly into a backplane without modifications
MTCA.1	Air Cooled Rugged MicroTCA			R1.0		19-Mar-09	Adopted		Ruggedized version of MicroTCA for exterior and mobile communications applications
MTCA.2	Hardened Air Cooled MicroTCA						Under Development		Expand the market for MicroTCA into commercial and military ruggedized applications
MTCA.3	Hardened Conduction Cooled MicroTCA						Under Development

HPM.1	HPMI.1			R1.0		Jun-2007	Adopted		Defines management firmware upgrade capability
ATCA300.0	ATCA300			R1.0			Dormant		Define a standard approach for implementing AdvancedTCA based equipment which requires compliance with 300mm ANSI and ETSI equipment practices. The intent is to re-define the size of the front board and eliminate the standard AdvancedTCA Rear Transition Modules.
TBD	PICMG/VITA Liason Project PICMG XMC						ANSI/VITA 42 completed		This PICMG subcommittee is studying VITA’s XMC (VITA 42) standard for using PCI Express on PMC modules. Comments and suggestions will be forwarded to VITA for their consideration.
TBD	PICMG/SAF Liason Project HPI Mapping to AdvancedTCA						Adopted by SAF		PICMG worked with the Service Availability Forum to harmonize SAF’s HPI specification with AdvancedTCA.
TBD	Requirements Engineering Subcommittee (RES)					Sep 2007	Complete		This subcommittee is chartered with summarizing and categorizing the mandatory and optional sections of AdvancedTCA and AdvancedMC specifications to make it easier for users and vendors to implement commercial off the shelf systems.
ICC.0	Interconnect Characterization						Under Development		Specify methods for the characterization of the passive elements of backplane and mezzanine interconnects.
The following specifications were developed by the ASI Sig which has now disbanded and transferred these documents to PICMG. They were not developed using PICMG’s process but are now available under the same commercial terms as other PICMG specifications.
ASI Core		ASI Core	R1.0.		Dec 2003			Adopted	Advanced Switching Core Architecture Specification
ASI PI-8		ASI Protocol Interface #8	R1.0		Feb 2004			Adopted	PCI-Express to Advanced Switching Bridge Architecture Specification
ASI SDT		ASI Socket Data Interface	R1.0		Feb 2004			Adopted	Advanced Switching - Socket Data Interface
ASI SQP		ASI Simple Queuing Protocol	R1.0		Feb 2004			Adopted	Advanced Switching - Simple Queuing Protocol
ASI SLS		ASI – SLS Specification	R1.0		Feb 2004			Adopted	Simple Load/Store (SLS) Specification
ASI Portal		ASI Portal Specification	R1.0		Aug 2004			Adopted	A Standard Interface for Accessing the AS Fabric for PCI Express® Based Systems
			Errata		Mar 2005			Adopted

Notes
Completed specifications are those for which at least one revision has been submitted to the Executive Membership and adopted. In a few cases multiple revisions have been completed, resulting in the listing of obsolete revisions.

Completed PICMG® specifications are distributed to all PICMG members as a benefit of membership, and any manufacturer may make claims of compliance. PICMG does not endorse these claims, or assume responsibility for any failure to meet claims of compliance.

Specifications under development are those for which a subcommittee has been, or is in the process of being, formed. In some cases the summary indicates that subsequent revisions of completed specifications are under development. In other cases, where no completed specification is shown the document under development is the first on that subject.

Where available, links are provided from specification descriptions to short form versions of specifications. Short form specifications are provided for information only – do not attempt to design from these documents. The short form documents are subsets of their respective specifications. For complete guidelines on designs and implementations, the full specifications are required.

Warning!

Draft specifications and ECR’s are under the control of the subcommittee, if active. It is PICMG’s policy to prohibit claims of compliance with respect to a specification under development. Any such claims must be understood as applying to a draft, which is subject to change.